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INTEGRATED CIRCUITS
74ALVCHS16830 18-bit to 36-bit address driver with bus hold (3-State)
Product data Supersedes data of 2001 Sep 07 2002 Mar 15
Philips Semiconductors
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
FEATURES
* Diodes on inputs clamp overshoot * ESD classification testing is done to JEDEC Standard JESD22.
Protection exceeds 2000 V HBM per method A114.
PIN CONFIGURATION
TOP VIEW 2Y2 1Y2 GND 2Y1 1Y1 VCC A1 A2 GND 1 2 3 4 5 6 7 8 9 80 1Y3 79 2Y3 78 GND 77 1Y4 76 2Y4 75 VCC 74 1Y5 73 2Y5 72 GND 71 1Y6 70 2Y6 69 GND 68 1Y7 67 2Y7 66 VCC 65 1Y8 64 2Y8 63 GND 62 1Y9 61 2Y9 60 1Y10 59 2Y10 58 GND 57 1Y11 56 2Y11 55 VCC 54 1Y12 53 2Y12 52 GND 51 1Y13 50 2Y13 49 GND 48 1Y14 47 2Y14 46 VCC 45 1Y15 44 2Y15 43 GND 42 1Y16 41 2Y16
* Latch-up testing is done to JEDEC Standard JESD78, which
exceeds 100 mA.
* Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
* Packaged in thin very small-outline package (TVSOP) -- 0.4 mm
pitch
* Optimized for use with PCK953 in SDRAM module applications * Low noise, low skew
DESCRIPTION
The ALVCHS16830 address driver is designed for 2.3 V to 3.6 V VCC operation. Diodes to VCC have been added on the inputs to clamp overshoot. The bus hold feature retains the inputs' last state whenever the input bus goes to high impedance. This prevents floating inputs and eliminates the need for pull up or pull down resistors. To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The 74ALVCHS16830 is characterized for operation from -40 to +85 C.
A3 10 A4 11 GND 12 A5 13 A6 14 VCC 15 A7 16 A8 17 GND 18 A9 19 OE1 20 OE2 21 A10 22 GND 23 A11 24
FUNCTION TABLE
Inputs OE1 L L H H L L H OE2 H H L L L L H A H L H L H L X H L Z Z H L Z Outputs 1Yn 2Yn Z Z H L H L Z
A12 25 VCC 26 A13 27 A14 28 GND 29 A15 30 A16 31 GND 32 A17 33 A18 34 VCC 35 2Y18 36 1Y18 37 GND 38 2Y17 39 1Y17 40
SW00723
ORDERING INFORMATION
PACKAGES 80-pin plastic thin very small outline (TVSOP) TEMPERATURE RANGE -40 to +85 C ORDER CODE 74ALVCHS16830DGB DWG NUMBER SOT647-1
2002 Mar 15
2
853-2280 27859
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
LOGIC DIAGRAM (POSITIVE LOGIC)
VCC
PIN DESCRIPTION
PIN(S) 6, 15, 26, 35, 46, 55, 66, 75 7, 8, 10, 11, 13, 14, 16, 17, 19, 22, 24, 25, 27, 28, 30, 31, 33, 34 SYMBOL VCC An 1Yn, 2Yn FUNCTION Supply voltage Inputs Outputs
OE2
21 VCC
OE1
20 VCC 5 1Y1
1, 2, 4, 5, 36, 37, 39, 40, 41, 42, 44, 45, 47, 48, 50, 51, 53, 54, 56, 57, 59, 60, 61, 62, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77, 79, 80 20, 21 3, 9, 12, 18, 23, 29, 32, 38, 43, 49, 52, 58, 63, 69, 72, 78
OE1, OE2 GND
Output enable Ground
A1
7 4 2Y1
to 17 other channels
SW00724
ABSOLUTE MAXIMUM RATINGS
Over recommended operating free-air temperature range (unless otherwise noted).1 SYMBOL VCC VI VO IIK IOK IO ICC, IGND JA Tstg PARAMETER Supply voltage range Input voltage range Output voltage range Input clamp current Output clamp current Continuous output current Continuous current through each VCC or GND Package thermal impedance Storage temperature range See Note 4 See Note 2 See Notes 2 and 3 VI < 0 VO < 0 CONDITIONS RATING -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC +0.5 -50 -50 "50 "100 106 -65 to +150 UNIT V V V mA mA mA mA C/W C
NOTES: 1. Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. This value is limited to 4.6 V maximum. 4. The package thermal impedance is calculated in accordance with JESD 51.
2002 Mar 15
3
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
RECOMMENDED OPERATING CONDITIONS
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. LIMITS SYMBOL VCC VIH Supply voltage High-level High level input voltage VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V Low-level Low level input voltage Input voltage Output voltage VCC = 2.3 V IOH High-level output current VCC = 2.7 V VCC = 3 V VCC = 2.3 V IOL t/v Tamb Low-level output current VCC = 2.7 V VCC = 3 V Input transition rise or fall rate Operating free-air temperature VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V PARAMETER CONDITIONS MIN 2.3 1.7 2 -- -- 0 0 -- -- -- -- -- -- -- -40 MAX 3.6 -- V -- 0.7 V 0.8 VCC VCC -12 -12 -24 12 12 24 10 +85 ns/V C mA mA V V V UNIT
VIL VI VO
2002 Mar 15
4
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range (unless otherwise noted). LIMITS SYMBOL VIK PARAMETER II = -18 mA II = 18 mA IOH = -100 A IOH = -4 mA, VIH = 1.7 V VOH IOH = -6 mA, VIH = 1.7 V IOH = -8 mA, VIH = 2 V IOH = -12 mA, VIH = 2 V IOH = -24 mA, VIH = 2 V IOL = 100 A IOL = 4 mA, VIL = 0.7 V VOL IOL = 6 mA, VIL = 0.7 V IOL = 8 mA, VIL = 0.8 V IOL = 12 mA, VIL = 0.8 V IOL = 24 mA, VIL = 0.8 V II VI = VCC or GND VI = 0.7 V VI = 1.7 V II(hold) VI = 0.8 V VI = 2 V VI = 0 to 3.8 IOZ ICC ICC Control inputs Ci Co Data inputs Outputs VI = VCC or GND VO = VCC or GND 3.3 33V -- 3.3 V -- 8.21 3.53 -- -- pF V2 TEST CONDITIONS VCC 2.3 V 2.3 V 2.3 V to 3.6 V 2.3 V 2.3 V 2.7 V 3V 3V 2.3 V to 3.6 V 2.3 V 2.3 V 2.7 V 3V 3V 3.6 V 2.3 V 2.3 V 3V 3V 3.6 V 3.6 V 3.6 V 3 V to 3.6 V MIN -- -- VCC-0.2 1.9 1.7 2.4 2 2 -- -- -- -- -- -- -- 45 -45 75 -75 -- -- -- -- -- TYP1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 3.62 MAX -1.2 V VCC+1.2 -- -- -- -- -- V -- 0.2 0.4 0.55 0.55 0.6 V 0.8 5 -- -- -- -- 500 10 40 750 -- pF A A A A A V V V V UNIT
VO = VCC or GND VI = VCC or GND, IO = 0 One input at VCC - 0.8 V, Other inputs at VCC or GND
NOTES: 1. All typical values are at VCC = 3.3 V, Tamb = 25 C. 2. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
2002 Mar 15
5
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
SWITCHING CHARACTERISTICS
Over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 and 2). PARAMETER tpd ten tdis tsk(o)1 FROM (INPUT) A OE OE Output skew TO (OUTPUT) Y Y Y -- VCC = 2.5 V 0.2 V MIN 1.2 1 1 -- MAX 3.8 5.7 4.9 -- VCC = 2.7 V MIN -- -- -- -- MAX 4 5.7 5.4 -- VCC = 3.3 V 0.3 V MIN 1.7 1 1.7 -- MAX 3.5 4.8 5.2 500 UNIT ns ns ns ps
NOTE: 1. Output skew between any 2 outputs of same part switching in the same direction.
OPERATING CHARACTERISTICS, Tamb = 25 C
SYMBOL PARAMETER Power dissipation capacitance per driver All outputs enabled All outputs disabled CL = 0, f = 10 MHz 0 TEST CONDITIONS VCC = 2.5 V 0.2 V TYP 49 6 VCC = 3.3 V 0.3 V TYP 53 7.5 pF UNIT
Cpd
2002 Mar 15
6
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V 0.2 V
From Output Under Test CL = 30 pF (see Note A) 500
500
S1
2 x VCC Open GND
TEST
S1
tpd Open tPLZ/tPZL 2 x VCC tPHZ/tPZH GND
Load Circuit
Timing Input
VCC VCC/2 0V Input tsu th VCC VCC/2 VCC/2 0V VCC/2
tw VCC VCC/2 0V
Data Input
Voltage Waveforms Pulse Duration
Voltage Waveforms Setup and Hold Times
Output Control (low-level enabling) VCC tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) tPZH VOH Output Waveform 2 S1 at GND (see Note B)
VCC VCC/2 VCC/2 0V tPLZ VCC VCC/2 VOL + 0.15 V VOL tPHZ VOH VOH - 0.15 V 0V
Input
VCC/2
VCC/2 0V
tPLH Output VCC/2
tPHL VCC/2 VOL
VCC/2
Voltage Waveforms Propagation Delay Times
Voltage Waveforms Enable and Disable Times
SV01849
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns, tf 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load circuit and voltage waveforms
2002 Mar 15
7
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
PARAMETER MEASUREMENT INFORMATION VCC = 2.7 V and 3.3 V 0.3 V
6V From Output Under Test CL = 50 pF (see Note A) 500 500 S1 Open GND
TEST tpd tPLZ/tPZL tPHZ/tPZH
S1 Open 6V GND
Load Circuit
Timing Input
2.7 V 1.5 V 0V Input tsu th 2.7 V 1.5 V
tw 2.7 V 1.5 V 0V
Data Input
1.5 V
1.5 V 0V
Voltage Waveforms Pulse Duration
Voltage Waveforms Setup and Hold Times
Output Control (low-level enabling) 2.7 V tPZL Output Waveform 1 S1 at 6 V (see Note B) tPZH VOH Output Waveform 2 S1 at GND (see Note B)
2.7 V 1.5 V 1.5 V 0V tPLZ 3V 1.5 V VOL + 0.3 V tPHZ VOL
Input
1.5 V
1.5 V 0V
tPLH Output 1.5 V
tPHL 1.5 V VOL
1.5 V
VOH VOH - 0.3 V 0V
Voltage Waveforms Propagation Delay Times
Voltage Waveforms Enable and Disable Times
SV01850
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 2. Load circuit and voltage waveforms
2002 Mar 15
8
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
TSSOP80: plastic thin shrink small outline package; 80 leads; body width 6.1 mm
SOT647-1
2002 Mar 15
9
Philips Semiconductors
Product data
18-bit to 36-bit address driver with bus hold (3-State)
74ALVCHS16830
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 03-02
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 09605
Philips Semiconductors
2002 Mar 15 10

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